Purpose
Memory Sections are used for the division of the memory (RAM/ROM) into different blocks and allocate the “software” memory elements (
e.g. Labels), code accordingly inside them.
Each Memory Section has certain specific properties (
e.g. faster access of the elements, storing constant values). By default compiler vendors provide certain Memory Sections (
e.g. .data, .text) and additional Memory Sections can be created based on the project need by enhancing the linker configuration.
Definition
A “Memory Section” is a region in memory (RAM/ROM) and is addressed with a specific name. There can exist multiple “Memory Sections” inside the same Memory (RAM/ROM) but with different names. Memory Section names should be unique across the Memory (RAM/ROM).
Memory Sections can be of two types:
“Virtual Memory Sections” are defined as a part of data specification and are associated to the corresponding Memory Elements (e.g. Label’s) during the development phase of the software. Intention behind associating “Virtual Memory Sections” to Memory elements like Label’s is to control their allocation in specific Memory (e.g. Ram1 or Ram2) by linker.
As a part of linker configuration – It is possible to specify if a “Virtual Memory Section” (e.g. mem.Sec1) can be part of certain Memory (e.g. Ram1/Ram2/SYSRAM but not Ram3).
Example:
Software should be built for ManyCore ECU – containing 3 Cores (Core1, Core2, Core3). Following RAMs are associated to the Cores: Ram1 – Core1, Ram2 – Core2, Ram3 – Core3, and also there is SYSRAM.
Virtual Memory Section : mem.sec1 (is defined as part of data specification) is associated to Label1 and Label2.
In Linker configuration it is specified that mem.sec1 can be allocated only in Ram1 or Ram2.
Below diagram represents the linker configuration content - w.r.t. possibility for physical allocation of mem.sec1 in various memories .
Based on the above configuration – Linker will allocate Label1, Label2 either in Ram1/Ram2/SYSRAM but not in Ram3/Ram4.
“Physical Memory Sections” are generated by linker. The linker allocates various memory elements (e.g. Label’s) inside “Physical Memory Sections”.
Each “Physical Memory Section” has following properties:
Example: There can exist mem.sec1.py inside Ram1 and also in Ram2. But these are physically two different elements as they are associated to different memories (Ram1 and Ram2) and also they have different “start and end address”.
Below diagram represents the information w.r.t. virtual memory sections (defined in data specification and associated to memory elements) and physical memory sections (generated after linker run).
Below figure represents the modeling of “Memory Section” (both virtual and physical) information in AMALTHEA model:
Below are equivalent elements of AMALTHEA model used for modeling the Memory Section information:
Example: PhysicalSectionConstraint-1 is specifying following relation “Section-1” <--> “Memory-1”, “Memory-2”. This means that the corresponding Physical Memory Section for “Section-1” can be generated by linker in “Memory-1” or in “Memory-2” or in both.
Note: There is also a possibility to associate multiple Virtual Memory Section’s as linker has a concept of grouping Virtual Memory Sections while generation of Physical Memory Section.
Example: For the same Virtual Memory Section (e.g. Section-1), linker can generate multiple Physical Memory Sections in different Memories (e.g. PhysicalSectionMapping-1, PhysicalSectionMapping-2). Each PhysicalSectionMapping element is an individual entity as it has a separate start and end memory address.